ARCH-01: Electronics Workbench Isolation

Document ID: ARCH-01 | Version: 1.0 | Category: Laboratory Architecture

1. System Overview

The electronics workbench is designed to isolate the high-value host computer from the experimental hardware, creating a tiered "blast radius" that prevents hardware faults from migrating upstream.

2. The Isolation Hierarchy

Layer 1: The Sacrificial Layer (Powered USB Hub)

Ensures the PC motherboard is not directly connected to experimental hardware. If a massive overcurrent occurs, the hub fails first.

Layer 2: The Galvanic Layer (USB Isolator)

Breaks physical electrical connection while maintaining data flow. Critical for different ground potentials or industrial 24V systems.

Layer 3: The Power Layer (Bench PSU)

Dedicated, current-limited supply for external loads, preventing the MCU from acting as a power source.

3. Signal Flow Map

[Host PC] → [Powered Hub] → [USB Isolator] → [ESP32 MCU] → [Driver Circuitry] → [External Load]